The present invention relates to power transistors of the vertical type, principal examples of which are metal oxide silicon field effect transistors (hereinafter MOSFETs) and insulated gate bipolar transistors (hereinafter IGBTs).
Transistors of this type having various geometries are disclosed, for example, in U.S. Pat. Nos. 4,823,176 and 5,008,725.
One of the limiting factors associated with known MOSFET and IGBT structures is the tradeoff which exists between gate oxide thickness, threshold voltage and the slope of the V-I characteristic. Specifically, in order to lower the threshold voltage the thickness of the gate oxide layer must be reduced and/or the impurity concentration in the channel region must be reduced. However, if the impurity concentration in the channel region is too low, the dependency of the drain current on drain voltage will increase, i.e. the current vs voltage characteristic will have a larger proportionality constant. This is because the depletion region will then partially extend into the channel region and thus lower its resistance. This is commonly referred to as the "short channel effect" and presents particular problems in devices with shallow junctions. Therefore, in the case of such devices, it is necessary to reduce the thickness of the gate oxide layer, and this gives rise to other problems due to the fact that it is more difficult to manufacture a thin gate oxide layer and such a thin layer gives rise to a reduced gate rupture voltage.
Another aspect of the above-noted tradeoff is that, all other factors being equal, an increase in breakdown voltage is associated with an increased on-resistance.
Another problem associated with prior art devices of this type is that their breakdown voltage is dependent on the structure present at their edges.